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Zoek Pin Tadbund Hyderabad, Hyderabad, Telangana

Permanent (Full time)

Job Description

  • Define and develop verification environments
  • Write verification plans, and documentation
  • Generate test bench and automatic regression plans
  • Be responsible for verification architecture, simulations, verifications, and debugging of circuit and logic designs
  • Complete block-level verification and chip level verification
  • Bring a self-motivated and enthusiastic approach that will achieve any new requirements and overcome all challenges
  • Able to work mostly independently and handle complex SoC Verification platform Able to debug the RTL for design intent and Interface with cross-functional teams and collaboration in all verification related activities

Job Requirements

  • Minimum of 4+ years related proven silicon design or verification work experience
  • Hands on project experience with leading edge verification methodologies like OVM/UVM
  • One of the Protocol knowledge AXI/Ethernet/USB/eMMC/SD/SDIO is must
  • Hands on project experience in coverage/assertion driven verification
  • Knowledge of IC chip design, development flow, process, and methodology
  • Knowledge of CMOS logic design, circuit design, and circuit analysis
  • Proficient in HDL languages SystemVerilog, Verilog and VHDL
  • Good knowledge of UNIX shell scripting, Perl and TCL scripting.
  • Good knowledge and understanding of CMOS device operation and characteristics
  • Proven experience in writing verification plans and test bench development , simulation, and debugging
  • Proficient with UNIX environment, and CAE/CAD tools such as schematic capture, simulation, design verification
  • Must be able to learning new technology
  • Good analytical and problem solving skills
  • Excellent written and verbal communication in English.
  • Experience dealing with and communicating at different levels of the organization

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